The present invention relates to computer memory systems, and more specifically, to streaming stress testing of cache memory of a processor in a computer system.
In some computer systems, cache memory can increase instruction and data processing throughput, but cache memory can be difficult to test. Validation and verification processes performed during cache memory system development can apply traffic to cache memory to confirm that the cache memory is operating as expected. Cache memory may be stress tested by making demands on cache lines using a dedicated thread of a multi-threaded processor to access a shared cache. However, the ability to fully stress the cache memory is limited with this approach. Further, depending on the processor workload, there may not be threads available for implementing stress tests, which can slow testing progress and increase total testing time.